R8C11 Datasheet, PDF (64/227 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY/R8C/Tiny SERIES

R8C/11 Group
10.1 Interrupt Overview
Interrupt control register⁽²⁾
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
KUPIC
ADIC
CMP1IC
S0TIC, S1TIC
S0RIC, S1RIC
INT2IC
TXIC
TYIC
TZIC
INT1IC
INT3IC
TCIC
CMP0IC
Address
004D16
004E16
005016
005116, 005316
005216, 005416
005516
005616
005716
005816
005916
005A16
005B16
005C16
After reset
XXXXX0002
XXXXX0002
XXXXX0002
XXXXX0002
XXXXX0002
XXXXX0002
XXXXX0002
XXXXX0002
XXXXX0002
XXXXX0002
XXXXX0002
XXXXX0002
XXXXX0002
Bit symbol
Bit name
Function
RW
ILVL0 ^{Interrupt priority level}
select bit
b2 b1 b0
RW
0 0 0 : Level 0 (interrupt disabled)
0 0 1 : Level 1
ILVL1
0 1 0 : Level 2
0 1 1 : Level 3
RW
1 0 0 : Level 4
1 0 1 : Level 5
ILVL2
1 1 0 : Level 6
1 1 1 : Level 7
RW
IR
(b7-b4)
Interrupt request bit
0 : Interrupt not requested
1 : Interrupt requested
Nothing is assigned.
When write, set to “0”. When read, its content is indeterminate.
RW⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
0
Symbol
INT0IC
Address
005D16
After reset
XX00X0002
Bit symbol
Bit name
Function
RW
ILVL0 Interrupt priority level
select bit
b2 b1 b0
0 0 0 : Level 0 (interrupt disabled)
RW
0 0 1 : Level 1
ILVL1
0 1 0 : Level 2
0 1 1 : Level 3
1 0 0 : Level 4
RW
1 0 1 : Level 5
ILVL2
1 1 0 : Level 6
1 1 1 : Level 7
RW
IR
POL
Interrupt request bit
Polarity select bit^{(3, 4)}
(b5)
Reserved bit
0: Interrupt not requested
1: Interrupt requested
0 : Selects falling edge
1 : Selects rising edge
Set to “0”
RW⁽¹⁾
RW
RW
(b7-b6)
Nothing is assigned.
When write, set to “0”. When read, its content is indeterminate.
NOTES:
1. Only "0" can be written to the IR bit. (Do not write "1").
2. To rewrite the interrupt control register, do so at a point that does not generate the interrupt request for that register.
Refer to the paragraph 19.2.6 “Changing Interrupt Control Registers”.
3. If the INTOPL bit in the INTEN register is set to “1” (both edges), set the POL bit to "0 " (selecting falling edge).
4. The IR bit may be set to “1” (interrupt requested) when the POL bit is rewritten. Refer to the paragraph 19.2.5
“Changing Interrupt Factor” .
Figure 10.3 Interrupt Control Registers
Rev.1.20 Jan 27, 2006 page 53 of 204
REJ09B0062-0120