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M37753M6C-XXXFP Datasheet, PDF (6/13 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
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MITSUBISHI MICROCOMPUTERS
M37753M6C-XXXFP, M37753M6C-XXXHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
PIN DESCRIPTION
Pin
VCC, VSS
CNVSS
Name
Power supply
CNVSS input
RESET
Reset input
XIN
XOUT
E
BYTE
(Note)
Clock input
Clock output
Enable output
Bus width select input
AVCC,
AVSS
VREF
P00–P07
Analog supply input
Reference voltage input
I/O port P0
P10–P17 I/O port P1
P20–P27 I/O port P2
P30–P33 I/O port P3
Input/
Output
Input
Input
Input
Output
Output
Input
Input
I/O
I/O
I/O
I/O
Functions
Supply 5 V±10 % to VCC and 0 V to VSS.
This pin controls the processor mode. Connect to VSS for single-chip mode or memory
expansion mode. Connect to VCC for microprocessor mode.
This is reset input pin. The microcomputer is reset when supplying “L” level to this
pin.
These are I/O pins of internal clock generating circuit. Connect a ceramic or quartz-
crystal resonator between XIN and XOUT. When an external clock is used, the clock
source should be connected to the XIN pin and the XOUT pin should be left open.
Data or instruction read, data write are performed when output from this pin is “L”.
This pin determines whether the external data bus is 8-bit width or 16-bit width for
memory expansion mode or microprocessor mode. The width is 16 bits when “L”
signal inputs and 8 bits when “H” signal inputs.
Power supply for the A-D converter and the D-A converter. Connect AVCC to VCC
and AVSS to VSS externally.
This is reference voltage input pin for the A-D converter and the D-A converter.
In single-chip mode, port P0 is an 8-bit I/O port. This port has an I/O direction
register and each pin can be programmed for input or output. These ports are in
the input mode when reset. Address (A0–A7) is output in memory expansion mode
or microprocessor mode.
In single-chip mode, these pins have the same functions as port P0. When the
BYTE pin is set to “L” in memory expansion mode or microprocessor mode and
external data bus is 16-bit width, high-order data (D8–D15) is input or output if E
output is “L” and an address (A8–A15) is output if E output is “H”. When the BYTE
pin is set to “H” and an external data bus is 8-bit width, only address (A8–A15) is
output.
In single-chip mode, these pins have the same functions as port P0. In memory
expansion mode or microprocessor mode, low-order data (D0–D7) is input or output
when E output is “L” and an address (A16–A23) is output when E output is “H”.
In single-chip mode, these pins have the same functions as port P0. In memory
expansion mode or microprocessor mode, R/W, BHE , ALE, and HLDA signals are
output.
P40–P47 I/O port P4
I/O In single-chip mode, these pins have the same functions as port P0. In memory
expansion mode or micro processor mode, P40, P41, and P42 become HOLD and
RDY input pins, and clock φ1 output pin respectively. Functions of other pins are the
same as in single-chip mode. In memory expansion mode, P42 can be pro-
grammed as I/O port.
P50–P57 I/O port P5
P60–P67 I/O port P6
P70–P77 I/O port P7
I/O In addition to having the same functions as port P0 in single-chip mode, these pins
also function as I/O pins for timer A0, timer A1, timer A2, timer A3, output pins for
motor drive waveform, and input pins for key input interrupt.
I/O In addition to having the same functions as port P0 in single-chip mode, these pins
also function as I/O pins for timer A4, input pins for external interrupt input INT0,
INT1, and INT2, and input pins for timer B0, timer B1, and timer B2, and output pin
for motor drive wave form.
I/O In addition to having the same functions as port P0 in single-chip mode, these pins
also function as input pins for A-D converter.
P80–P87 I/O port P8
I/O In addition to having the same functions as port P0 in single-chip mode, these pins
also function as I/O pins for UART0, UART1, output pins for D-A converter, and
input pins for INT3, INT4.
Note: It is impossible to change the input level of the BYTE pin in each bus cycle. In other words, bus width cannot be switched dynamically. Fix the input
level of the BYTE pin to “H” or “L” according to the bus width used.
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