HD74LV125A Datasheet, PDF (6/10 Pages) Hitachi Semiconductor – Quad. Bus Buffer Gates with 3-state Outputs

HD74LV125A
Noise Characteristics
Item
Quiet output, maximum
dynamic V_OL
Quiet output, minimum
dynamic V_OL
Quiet output, minimum
dynamic V_OH
High-level dynamic input
voltage
Low-level dynamic input
voltage
Symbol V_CC = (V)
V_{OL (P)}
3.3
Ta = 25°C
Min
Typ
—
0.3
V_{OL (V)}
3.3
—
–0.3
V_{OH (V)}
3.3
—
3.0
V_{IH (D)}
3.3
2.31
—
V_{IL (D)}
3.3
—
—
Max
0.8
–0.8
—
—
0.99
C_L = 50 pF
Unit Test Conditions
V
V
V
V
V
Test Circuit
V_CC
V_CC
Input
Pulse Generator
Z OUT = 50 Ω
Output
1 k Ω _S1
C_L =
15 or 50 pF
OPEN
*1 See under table
GND
TEST
t_PLH /t_PHL
t _ZH/t_HZ
t_ZL /t_LZ
S1
OPEN
GND
V_CC
Note: 1. C_L includes probe and jig capacitance.
Rev.3.00 Jun. 03, 2004 page 6 of 9