HD74HCT125 Datasheet, PDF (6/9 Pages) Hitachi Semiconductor – Quad. Bus Buffer Gates (with 3-state outputs)

HD74HCT125, HD74HCT126
Waveforms
• HD74HCT126
• Waveform – 1
tr
Input A
10 %
90 %
1.3 V
t_PLH
tf
90 %
1.3 V
10 %
t_PHL
Output Y
1.3 V
1.3 V
• Waveform – 2
tr
Input C
10 %
90 %
1.3 V
t_ZL
Waveform - A
1.3 V
t_ZH
Waveform - B
1.3 V
tf
90 %
1.3 V
10 %
t_LZ
t_HZ
10 %
90 %
Notes : 1. t_r ≤ 6 ns, t_f ≤ 6 ns
2. Input waveform : PRR ≤ 1 MHz, duty cycle 50%
3. Waveform– A is for an output with internal conditions such that the
output is low except when disabled by the output control.
4. Waveform– B is for an output with internal conditions such that the
output is high except when disabled by the output control.
V_CC
0V
V_OH
V_OL
V_CC
0V
V_OH
V_OL
V_OH
V_OL
Rev.2.00 Mar 30, 2006 page 6 of 8