HD74HCT125 Datasheet, PDF (4/9 Pages) Hitachi Semiconductor – Quad. Bus Buffer Gates (with 3-state outputs)

HD74HCT125, HD74HCT126
Switching Characteristics
Item
Propagation delay time
Output enable time
Output disable time
Output rise/fall time
Input capacitance
Symbol V_CC (V)
t_PHL
4.5
t_PLH
4.5
t_ZL
4.5
t_ZH
4.5
t_LZ
4.5
t_HZ
4.5
t_TLH
4.5
t_THL
4.5
Cin
—
Ta = 25°C
Min Typ Max
— 12 20
— 12 20
— 12 30
— 12 30
— 15 30
— 15 30
— 4 12
— 4 12
— 5 10
(C_L = 50 pF, Input t_r = t_f = 6 ns)
Ta = –40 to +85°C
Unit
Min Max
Test Conditions
—
25
ns
—
25
—
38
ns
—
38
—
38
ns
—
38
—
15
ns
—
15
—
10
pF
Test Circuit
V_CC
V_CC
Input
Pulse generator
ZOUT = 50 Ω
C
Output
A
Y
1 k Ω _S1
C_L = 50 pF
OPEN
*1 See under table
GND
Note: C_L includes the probe and jig capacitance.
TEST
t_PLH / t_PHL
t_ZH / t_HZ
t_ZL / t_LZ
S1
OPEN
GND
V_CC
Rev.2.00 Mar 30, 2006 page 4 of 8