HAT3029R_16 Datasheet, PDF (6/11 Pages) Renesas Technology Corp – Silicon N/P Channel Power MOS FET Power Switching

HAT3029R
 P Channel
Power vs. Temperature Derating
1.6
Test Condition :
When using the glass epoxy board
(FR4 40x40x1.6 mm), PW ≤ 10 s
1.2
0.8
0.4
0
50
100
150
200
Ambient Temperature Ta (°C)
Typical Output Characteristics
-20
-10 V
Pulse Test
-4 V
-16
-3.5 V
-3.2 V
-12
-3 V
-8
-2.8 V
-4
-2.5 V
V_GS = -2 V
0
-2
-4
-6
-8 -10
Drain to Source Voltage V_DS (V)
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
-160
-6 A
-120
-80
-3 A
-40
I_D = -1 A
Pulse Test
0
-4
-8 -12 -16 -20
Gate to Source Voltage V_GS (V)
REJ03G1597-0601 Rev.6.01
Nov. 24, 2016
Preliminary
Maximum Safe Operation Area
-100
-10
-1
-0.1
PW _{= 10}
DC _Operation
Operation in
(PW
this area is
1
1001_μ^0sμs
ms
ms _(1shot)
≤ ₁₀N_{sot)e 5}
limited by R_DS(on)
-0.01
Ta = 25°C
-0.001 ^{1 shot Pulse}
-0.1
-1
-10
-100
Drain to Source Voltage V_DS (V)
Note 5 : When using the glass epoxy board
(FR4 40x40x1.6 mm)
Typical Transfer Characteristics
-20
V_DS = -10 V
Pulse Test
-16
-12
-8
−25°C
Tc = 75°C
-4
25°C
0
-1
-2
-3
-4 -5
Gate to Source Voltage V_GS (V)
Static Drain to Source on State Resistance
vs. Drain Current
1000
Pulse Test
500
200
-4.5 V
100
50
20
V_GS = -10 V
10
-0.1 -0.3 -1 -3 -10 -30 -100
Drain Current I_D (A)
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