H8S2164 Datasheet, PDF (599/906 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family / H8S/2400 Series

Section 18 LPC Interface (LPC)
• STR3 (TWRE = 1 or SELSTR3 = 0)
R/W
Bit Bit Name Initial Value Slave Host Description
7 IBF3B 0
R
R Bidirectional Data Register Input Buffer Full Flag
This is an internal interrupt source to the slave (this
LSI).
0: [Clearing condition]
When the slave reads TWR15
1: [Setting condition]
When the host writes to TWR15 in I/O write cycle
6 OBF3B 0
R/(W)* R Bidirectional Data Register Output Buffer Full Flag
0: [Clearing conditions]
• When the host reads TWR15 in I/O read cycle
• When the slave writes 0 to the OBF3B bit
1: [Setting condition]
When the slave writes to TWR15
5 MWMF 0
R
R Master Write Mode Flag
0: [Clearing condition]
When the slave reads TWR15
1: [Setting condition]
When the host writes to TWR0 in I/O write cycle
while SWMF = 0
4 SWMF 0
R/(W)* R Slave Write Mode Flag
In the event of simultaneous writes by the master
and the slave, the master write has priority.
0: [Clearing conditions]
• When the host reads TWR15 in I/O read cycle
• When the slave writes 0 to the SWMF bit
1: [Setting condition]
When the slave writes to TWR0 while MWMF = 0
Rev. 1.00 Mar. 17, 2008 Page 559 of 862
REJ09B0429-0100