English
Language : 

H8S2164 Datasheet, PDF (570/906 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family / H8S/2400 Series
Section 18 LPC Interface (LPC)
• Supports SERIRQ
 Host interrupt requests are transferred serially on a single signal line (SERIRQ).
 On channel 1, HIRQ1 and HIRQ12 can be generated.
 On channels 2 and 3, SMI, HIRQ6, and HIRQ9 to HIRQ11 can be generated.
 In the SCIF, SMI, and HIRQ1 to HIRQ15 can be generated.
 Operation can be switched between quiet mode and continuous mode.
 The CLKRUN signal can be manipulated to restart the PCI clock (LCLK).
• Power-down modes and interrupts
 The LPC module can be shut down by inputting the LPCPD signal.
 Three pins, PME, LSMI, and LSCI, are provided for general input/output.
• Supports version 1.5 of the Intelligent Platform Management Interface (IPMI) specifications
 Channel 3 supports the SMIC interface, KCS interface, and BT interface.
Rev. 1.00 Mar. 17, 2008 Page 530 of 862
REJ09B0429-0100