S3A3 Datasheet, PDF (56/139 Pages) Renesas Technology Corp – Microcontroller

S3A3
2.3 AC Characteristics
2.3.1
Frequency
2. Electrical Characteristics
Table 2.17 Operation frequency value in high-speed operating mode
Conditions: VCC = AVCC0 = 2.4 to 5.5 V
Parameter
Operation
frequency
System clock (ICLK)*⁴
FlashIF clock (FCLK)*^1, *^2, *⁴
Symbol Min
Typ
2.7 to 5.5 V
f
0.032768
-
2.4 to 2.7 V
0.032768
-
2.7 to 5.5 V
0.032768
-
Peripheral module clock (PCLKA)*⁴
2.4 to 2.7 V
2.7 to 5.5 V
0.032768
-
-
-
Peripheral module clock (PCLKB)*⁴
2.4 to 2.7 V
2.7 to 5.5 V
-
-
-
-
2.4 to 2.7 V
Peripheral module clock (PCLKC)*^3, *⁴ 2.7 to 5.5 V
-
-
-
-
Peripheral module clock (PCLKD)*⁴
2.4 to 2.7 V
2.7 to 5.5 V
-
-
-
-
External bus clock (BCLK)*⁴
2.4 to 2.7 V
2.7 to 5.5 V
2.4 to 2.7 V
-
-
-
-
-
-
EBCLK pin output
2.7 to 5.5 V
-
-
2.4 to 2.7 V
-
-
Max*⁵
48
16
32
16
48
16
32
16
64
16
64
16
24
16
12
8
Unit
MHz
Note 1.
Note 2.
Note 3.
Note 4.
Note 5.
The lower-limit frequency of FCLK is 1 MHz while programming or erasing the flash memory. When using FCLK for
programming or erasing the flash memory at below 4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer
frequency such as 1.5 MHz cannot be set.
The frequency accuracy of FCLK must be ±3.5% while programming or erasing the flash memory. Confirm the frequency
accuracy of the clock source.
The lower-limit frequency of PCLKC is 4 MHz at 2.4 V or above and 1 MHz at below 2.4 V when the 14-bit A/D converter is in
use.
See section 9, Clock Generation Circuit in User’s Manual for the relationship of frequencies between ICLK, PCLKA, PCLKB,
PCLKC, PCLKD, FCLK, and BCLK.
The maximum value of operation frequency does not include the internal oscillator errors. The operation can be guaranteed
with the errors of the internal oscillator. For details on the range for guaranteed operation, see Table 2.22, Clock timing.
R01DS0307EU0100 Rev.1.00
Mar 7, 2017
Page 56 of 139