NP48N055EHE_15 Datasheet, PDF (5/12 Pages) Renesas Technology Corp – SWITCHING N-CHANNEL POWER MOS FET

NP48N055EHE, NP48N055KHE, NP48N055CHE, NP48N055DHE, NP48N055MHE, NP48N055NHE
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
Zero Gate Voltage Drain Current
IDSS
VDS = 55 V, VGS = 0 V
Gate Leakage Current
Gate to Source Threshold Voltage
IGSS
VGS(th)
VGS = ±20 V, VDS = 0 V
VDS = VGS, ID = 250 μA
Forward Transfer Admittance
| yfs |
VDS = 10 V, ID = 24 A
Drain to Source On-state Resistance
RDS(on)
VGS = 10 V, ID = 24 A
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Ciss
Coss
Crss
VDS = 25 V,
VGS = 0 V,
f = 1 MHz
Turn-on Delay Time
Rise Time
Turn-off Delay Time
td(on)
tr
td(off)
VDD = 28 V, ID = 24 A,
VGS = 10 V,
RG = 1 Ω
Fall Time
tf
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
QG
VDD = 44 V,
QGS
QGD
VGS = 10 V,
ID = 48 A
Body Diode Forward Voltage
VF(S-D)
IF = 48 A, VGS = 0 V
Reverse Recovery Time
Reverse Recovery Charge
trr
IF = 48 A, VGS = 0 V,
Qrr
di/dt = 100 A/μs
MIN.
2.0
7
TYP.
3.0
17
14
1600
250
120
22
16
35
12
33
9
12
1.0
40
55
MAX.
10
±10
4.0
17
2400
380
220
48
40
70
30
50
UNIT
μA
μA
V
S
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
ns
nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
RG = 25 Ω
L
PG.
50 Ω
VDD
VGS = 20 → 0 V
IAS
ID
VDD
BVDSS
VDS
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
PG.
RG
VGS
0
τ
τ = 1 μs
Duty Cycle ≤ 1%
RL
VDD
VGS
VGS
Wave Form
10%
0
VDS
90%
VDS
VDS
0
Wave Form
td(on)
VGS
90%
90%
10% 10%
tr td(off)
tf
ton
toff
D.U.T.
IG = 2 mA
RL
PG.
50 Ω
VDD
Data Sheet D14094EJ6V0DS
3