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HD74LS76A Datasheet, PDF (5/7 Pages) Hitachi Semiconductor – Dual J-K Flip-Flop(with Preset and Clear)
HD74LS76A
Waveforms 1
Clock
Q
10%
tTLH
tTHL
90% 90%
tw(L)
1.3 V 1.3 V
10%
tw(H)
tPLH
1.3 V 1.3 V
tPHL
1.3 V
tPHL
1.3 V
tPLH
3V
0V
VOH
VOL
Note:
Q
VOH
1.3 V
1.3 V
VOL
Clock input pulse; tTLH ≤ 15 ns, tTHL ≤ 6 ns, PRR = 1 MHz, duty cycle = 50% and for fmax.,
tTLH = tTHL ≤ 2.5 ns
Waveforms 2
Clear
Preset
Q
tTHL
tTLH
90%
1.3V
10%
tw (CLR)
90%
1.3V
10%
tPHL
1.3V
tPLH
3V
0V
tTHL
tTLH
90%
1.3V
10%
tw (PR)
90% 3V
1.3V
10%
0V
tPLH
1.3V
VOH
VOL
VOH
1.3V
1.3V
Q
tPHL
VOL
Note: Crear and preset input pulse; tTLH ≤ 15 ns, tTHL ≤ 6 ns, PRR = 1 MHz,
Rev.3.00, Jul.22.2005, page 5 of 6