HD74LS76A Datasheet, PDF (4/7 Pages) Hitachi Semiconductor – Dual J-K Flip-Flop(with Preset and Clear)

HD74LS76A
Testing Method
Test Circuit
1. ƒ_max, t_PLH, t_PHL, (Clock→Q, Q)
V_CC Output Q
Input 4.5V
P.G.
Zout=50Ω
PR
J
CK
K
CLR
Q
Output Q
Q
Load circuit 1
RL
CL
Same as Load Circuit 1.
Notes:
1. Test is put into the each flip-flop.
2. C_L includes probe and jig capacitance.
3. All diodes are 1S2074(H).
2. t_PHL, t_PLH (Clear, Preset→ Q, Q)
Input
P.G.
Zout=50Ω
4.5V
Input
P.G.
Zout=50Ω
V_CC Output Q
PR
J
CK
K
CLR
Q
Output Q
Q
Load circuit 1
RL
CL
Same as Load Circuit 1.
Notes:
1. Test is put into the each flip-flop.
2. C_L includes probe and jig capacitance.
3. All diodes are 1S2074(H).
Rev.3.00, Jul.22.2005, page 4 of 6