HAT2199R Datasheet, PDF (5/8 Pages) Renesas Technology Corp – Silicon N Channel Power MOS FET Power Switching

HAT2199R
Reverse Drain Current vs.
Source to Drain Voltage
10
8
10 V
5V
6
V_GS = 0 V
4
2
Pulse Test
0
0.4 0.8 1.2 1.6 2.0
Source to Drain Voltage V_SD (V)
Maximum Avalanche Energy vs.
Channel Temperature Derating
20
I_AP = 11 A
16
V_DD = 15 V
duty < 0.1 %
Rg > 50 Ω
12
8
4
0
25 50 75 100 125 150
Channel Temperature Tch (°C)
Normalized Transient Thermal Impedance vs. Pulse Width
10
D=1
1
0.1
0.01
0.001
0.5
0.2
0.1
0.05
0.02
0.01 _{1shot pulse}
0.0001
10 µ 100 µ 1 m
θch - f(t) = γs (t) x θch - f
θch - f = 100°C/W, Ta = 25°C
When using the glass epoxy board
(FR4 40 x 40 x 1.6 mm)
PDM
PW
T
D=
PW
T
10 m 100 m 1
10
Pulse Width PW (s)
100 1000 10000
Rev.3.00, Sep.23.2004, page 5 of 7