2SK1405 Datasheet, PDF (5/7 Pages) Hitachi Semiconductor – Silicon N-Channel MOS FET

2SK1405
Reverse Drain Current vs.
Source to Drain Voltage
20
Pulse Test
16
12
8
V_GS = 0, –5 V
4
10 V
0
0 0.4 0.8 1.2 1.6 2.0
Source to Drain Voltage V_SD (V)
Normalized Transient Thermal Impedance vs. Pulse Width
3
D=1
1
0.5
Tc = 25°C
0.3
0.2
0.1
0.1
0.05
θch – c (t) = γ s (t) • θch – c
θch – c = 2.08°C/W, Tc = 25°C
0.03
0.02
0.₁⁰_s¹_{hot pulse}
P_DM
D = ^PW
T
PW
T
0.01
10 µ
100 µ
1m
10 m
100 m
1
10
Pulse Width PW (S)
Switching Time Test Circuit
Vin Monitor
D.U.T.
Vout
Monitor
R_L
Vin
10 V
50 Ω
V_DD
= 30 V
Waveform
90%
Vin
Vout
10%
10%
10%
td(on)
90%
90%
tr
td(off)
tf
Rev.3.00 May 15, 2006 page 5 of 6