2SK1304 Datasheet, PDF (5/7 Pages) Hitachi Semiconductor – Silicon N-Channel MOS FET

2SK1304
Reverse Drain Current vs.
Source to Drain Voltage
50
Pulse Test
40
30
10 V
20
5V
10
V_GS = 0, –5 V
0
0.4 0.8 1.2 1.6 2.0
Source to Drain Voltage V_SD (V)
Normalized Transient Thermal Impedance vs. Pulse Width
3
D=1
1.0
0.5
T_C = 25°C
0.3 _0.2
0.1
0.1 _0.05
θch–c (t) = γ_S (t) • θch–c
θch–c = 1.25°C/W, T_C = 25°C
0.02
P_DM
0.03
0.01
1 ^{Shot Pulse}
0.01
PW
T
D
=
PW
T
10 µ
100 µ
1m
10 m
100 m
1
10
Pulse Width PW (S)
Switching Time Test Circuit
Vin Monitor
D.U.T
Vout Monitor
R_L
Vin = 10 V
50 Ω
V_DD ^.=. 30 V
Waveforms
90 %
Vin 10 %
Vout 10 %
10 %
td(on)
90 %
90 %
tr
td(off)
tf
Rev.2.00 Sep 07, 2005 page 5 of 6