R8C35A Datasheet, PDF (472/766 Pages) Renesas Technology Corp – MCU M16C FAMILY / R8C/Tiny SERIES

Under development ^{Preliminary specification}
Specifications in this manual are tentative and subject to change
R8C/35A Group
22. Serial Interface (UARTi (i = 0 or 1))
22.3.1 Polarity Select Function
Figure 22.4 shows the Transfer Clock Polarity. Use the CKPOL bit in the UiC0 (i = 0 or 1) register to select the
transfer clock polarity.
• CKPOL bit in UiC0 register = 0 (transmit data output at the falling edge and
receive data input at the rising edge of the transfer clock)
CLKi⁽¹⁾
TXDi
D0
D1
D2
D3
D4
D5
D6
D7
RXDi
D0
D1
D2
D3
D4
D5
D6
D7
• CKPOL bit in UiC0 register = 1 (transmit data output at the rising edge and
receive data input at the falling edge of the transfer clock)
CLKi ⁽²⁾
TXDi
D0
D1
D2
D3
D4
D5
D6
D7
RXDi
D0
D1
D2
D3
Notes:
1. The CLKi pin level is high during no transfer.
2. The CLKi pin level is low during no transfer.
i = 0 or 1
Figure 22.4 Transfer Clock Polarity
D4
D5
D6
D7
22.3.2 LSB First/MSB First Select Function
Figure 22.5 shows the Transfer Format. Use the UFORM bit in the UiC0 (i = 0 to 1) register to select the
transfer format.
• UFORM bit in UiC0 register = 0 (LSB first) ⁽¹⁾
CLKi
TXDi
D0
D1
D2
D3
D4
D5
D6
D7
RXDi
D0
D1
D2
D3
D4
D5
D6
D7
• UFORM bit in UiC0 register = 1 (MSB first) ⁽¹⁾
CLKi
TXDi
D7
D6
D5
D4
D3
D2
D1
D0
RXDi
D7
D6
D5
D4
D3
D2
D1
D0
Note:
1. The above applies when:
CKPOL bit in UiC0 register = 0 (transmit data output at the falling edge and
receive data input at the rising edge of the transfer clock).
i = 0 or 1
Figure 22.5 Transfer Format
REJ09B0407-0010 Rev.0.10 Jan 16, 2008
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