R8C35A Datasheet, PDF (219/766 Pages) Renesas Technology Corp – MCU M16C FAMILY / R8C/Tiny SERIES

Under development ^{Preliminary specification}
Specifications in this manual are tentative and subject to change
R8C/35A Group
14. Watchdog Timer
14.2 Registers
14.2.1 Processor Mode Register 1 (PM1)
Address 0005h
Bit b7
b6
b5
b4
b3
b2
b1
b0
Symbol —
—
—
—
—
PM12
—
—
After Reset 0
0
0
0
0
0
0
0
Bit Symbol
Bit Name
Function
R/W
b0
— Reserved bits
Set to 0.
R/W
b1
—
b2 PM12 WDT interrupt/reset switch bit
0: Watchdog timer interrupt
R/W
1: Watchdog timer reset ⁽¹⁾
b3
— Nothing is assigned. If necessary, set to 0. When read, the content is 0.
—
b4
—
b5
—
b6
—
b7
— Reserved bit
Set to 0.
R/W
Note:
1. The PM12 bit is set to 1 when 1 is written by a program (and remains unchanged even if 0 is written to it).
This bit is automatically set to 1 when the CSPRO bit in the CSPR register is set to 1 (count source protection
mode enabled).
Set the PRC1 bit in the PRCR register to 1 (write enabled) before rewriting the PM1 register.
14.2.2 Watchdog Timer Reset Register (WDTR)
Address 000Dh
Bit b7
b6
b5
b4
b3
b2
b1
b0
Symbol —
—
—
—
—
—
—
—
After Reset X
X
X
X
X
X
X
X
Bit
Function
R/W
b7 to b0 Writing 00h and then FFh to this register initializes the watchdog timer.
W
The initial value of the watchdog timer is specified by bits WDTUFS0 and WDTUF1 in the OFS2
register.
14.2.3 Watchdog Timer Start Register (WDTS)
Address 000Eh
Bit b7
b6
b5
b4
b3
b2
b1
b0
Symbol —
—
—
—
—
—
—
—
After Reset X
X
X
X
X
X
X
X
Bit
Function
R/W
b7 to b0 A write instruction to this register starts the watchdog timer.
W
REJ09B0407-0010 Rev.0.10 Jan 16, 2008
Page 188 of 728