RJK0210DPA_10 Datasheet, PDF (4/7 Pages) Renesas Technology Corp – Silicon N Channel Power MOS FET Power Switching

RJK0210DPA
Static Drain to Source On State Resistance
vs. Temperature
10
Pulse Test
8
I_D = 5 A, 10 A, 20 A
6 ^{VGS = 4.5 V}
4
10 V
5 A, 10 A, 20 A
2
0
–25 0 25 50 75 100 125 150
Case Temperature Tc (°C)
Dynamic Input Characteristics
25
I_D = 40 A
V_DD = 10 V
20
20
V_GS
16
15
12
V_DS
10
8
5
4
0
0
0
10
20 30
40 50
Gate Charge Qg (nc)
Maximum Avalanche Energy vs.
Channel Temperature Derating
100
80
60
40
20
0
25 50 75 100 125 150
Channel Temperature Tch (°C)
Preliminary
Typical Capacitance vs.
Drain to Source Voltage
10000
3000
V_GS = 0
f = 1 MHz
Ciss
1000
300
Coss
100
30
Crss
10
0
10
20 25
Drain to Source Voltage V_DS (V)
Reverse Drain Current vs.
Source to Drain Voltage
100
10 V
Pulse Test
5V
80
60
40
20
V_GS = 0, –5 V
0
0.4 0.8 1.2 1.6 2.0
Source to Drain Voltage V_SD (V)
R07DS0217EJ0200 Rev.2.00
Dec 07, 2010
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