RJK0202DSP Datasheet, PDF (4/7 Pages) Renesas Technology Corp – Silicon N Channel Power MOS FET Power Switching

RJK0202DSP
Static Drain to Source on State Resistance
vs. Temperature
12
Pulse Test
10
I_D = 2A, 5A,10 A
8
V_GS = 2.5 V
6
4.5 V
4
2 A, 5 A, 10 A
2
-25 0 25 50 75 100 125 150
Case Temperature Tc (°C)
Dynamic Input Characteristics
50
20
I _D = 16 A
40
16
30
V DD = 10 V
5V
V_GS 12
20
8
V_DS
10
V _DD = 10 V
5V
0
20 40 60
4
0
80 100
Gate Charge Qg (nc)
Maximum Avalanche Energy vs.
Channel Temperature Derating
50
I_AP = 15 A
40
V_DD = 15 V
duty < 0.1 %
Rg > 50 
30
20
10
0
25 50 75 100 125 150
Channel Temperature Tch (°C)
Preliminary
10000
3000
1000
300
100
Typical Capacitance vs.
Drain to Source Voltage
Ciss
Coss
Crss
30
V_GS = 0
f = 1 MHz
10
0 5 10 15 20 25 30
Drain to Source Voltage V_DS (V)
Reverse Drain Current vs.
Source to Drain Voltage
20
16
10 V
12
V_GS = 0 V
8
4
Pulse Test
0
0.4 0.8 1.2 1.6 2.0
Source to Drain Voltage V_SD (V)
R07DS0238EJ0220 Rev.2.20
Jan 05, 2011
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