RJK0202DSP Datasheet, PDF (3/7 Pages) Renesas Technology Corp – Silicon N Channel Power MOS FET Power Switching

RJK0202DSP
Main Characteristics
Power vs. Temperature Derating
4.0
Test Condition :
When using the glass epoxy board
(FR4 40x40x1.6 mm), PW < 10 s
3.0
2.0
1.0
0
50
100
150
200
Ambient Temperature Ta (°C)
Typical Output Characteristics
20
10, 4.5 V
Pulse Test
16
1.5 V
12
1.4 V
8
4
V_GS = 1.3 V
0
2
4
6
8 10
Drain to Source Voltage V_DS (V)
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
200
Pulse Test
160
120
80
I_D = 10 A
40
5A
2A
0
4
8
12 16 20
Gate to Source Voltage V_GS (V)
R07DS0238EJ0220 Rev.2.20
Jan 05, 2011
Preliminary
Maximum Safe Operation Area
500
10 μs
100
10
1
Oper^Da^Ctio^On^pein^{ratPioWn (=PW10<1m1N0ms1ots0se})0^5μs
this area is
0.1 ^{limited by RDS(on)}
Ta = 25°C
0.01 ^{1 shot Pulse}
0.1 0.3 1 3 10 30 100
Drain to Source Voltage V_DS (V)
Note 5 : When using the glass epoxy board
(FR4 40x40x1.6 mm)
Typical Transfer Characteristics
20
V_DS = 10 V
Pulse Test
16
12
8
Tc = 75°C
4
25°C
–25°C
0
1
2
3
45
Gate to Source Voltage V_GS (V)
Static Drain to Source on State Resistance
vs. Drain Current
100
Pulse Test
50
20
10
V_GS = 2.5 V
5
4.5 V
2
1
1
10
100
1000
Drain Current I_D (A)
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