HD74LS74A_15 Datasheet, PDF (4/8 Pages) Renesas Technology Corp – Dual D-type Positive Edge-triggered Flip-Flops (with Preset and Clear)

HD74LS74A
Testing Method
Test Circuit
1. _max, t_PLH, t_PHL (ClockQ, Q)
Input
P.G.
Zout = 50Ω
Input
P.G.
Zout = 50Ω
Preliminary
4.5V VCC Output Q
PR
D
Q
CK
CLR
Output Q
Q
Load circuit 1
RL
CL
Same as Load Circuit 1.
Notes:
1. Test is put into the each flip-flop.
2. C_L includes probe and jig capacitance.
3. All diodes are 1S2074(H).
2. t_PHL, t_PLH (Clear or Preset Q, Q)
Input
P.G.
Zout = 50Ω
Input
P.G.
Zout = 50Ω
V_CC Output Q
PR
D
Q
CK
CLR
Output Q
Q
Load circuit 1
RL
CL
Same as Load Circuit 1.
Notes:
1. Test is put into the each flip-flop.
2. C_L includes probe and jig capacitance.
3. All diodes are 1S2074(H).
R04DS0012EJ0400 Rev.4.00
Dec 21, 2011
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