HD74LS74A_15 Datasheet, PDF (1/8 Pages) Renesas Technology Corp – Dual D-type Positive Edge-triggered Flip-Flops (with Preset and Clear)

Preliminary Datasheet
HD74LS74A
Dual D-type Positive Edge-triggered Flip-Flops
(with Preset and Clear)
R04DS0012EJ0400
(Previous: REJ03D0415-0300)
Rev.4.00
Dec 21, 2011
Features
 Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74LS74AP
DILP-14 pin
PRDP0014AB-B
(DP-14AV)
P
PRSP0014DF-B
HD74LS74AFPEL SOP-14 pin (JEITA)
(FP-14DAV)
FP
HD74LS74ARPEL SOP-14 pin (JEDEC) ^PRSP0014DE-A
RP
(FP-14DNV)
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
Pin Arrangement
1CLR 1
1D 2
1CK 3
1PR 4
1Q 5
1Q 6
GND 7
CK ^D
PR CLR
QQ
D _CK
CLR PR
QQ
(Top view)
14 V_CC
13 _2CLR
12 _2D
11 _2CK
10 _2PR
9 _2Q
8 2Q
Function Table
Input
Preset
Clear
Clock
D
Output
Q
Q
L
H
X
X
H
L
H
L
X
X
L
H
L
L
X
X
H*
H*
H
H

H
H
L
H
H

L
L
H
H
H
L
X
Q₀
Q₀
H; high level, L; low level, X; irrelevant, ; transition from low to high level,
Q₀; level of Q before the indicated steady-state input conditions were established.
Q₀; complement of Q₀ or level of Q before the indicated steady-state input conditions were established.
*;This configuration is nonstable, that is, it will not persist when preset and clear inputs return to their inactive (high) level.
R04DS0012EJ0400 Rev.4.00
Dec 21, 2011
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