HD74LS74A Datasheet, PDF (4/8 Pages) Hitachi Semiconductor – Dual D-type Positive Edge-triggered Flip-Flops(With Preset and Clear)

HD74LS74A
Testing Method
Test Circuit
1. ƒ_max, t_PLH, t_PHL (Clock→Q, Q)
Input
P.G.
Zout = 50Ω
Input
P.G.
Zout = 50Ω
4.5V VCC Output Q
PR
D
Q
CK
CLR
Output Q
Q
Load circuit 1
RL
CL
Same as Load Circuit 1.
Notes:
1. Test is put into the each flip-flop.
2. C_L includes probe and jig capacitance.
3. All diodes are 1S2074(H).
2. t_PHL, t_PLH (Clear or Preset→ Q, Q)
Input
P.G.
Zout = 50Ω
Input
P.G.
Zout = 50Ω
V_CC Output Q
PR
D
Q
CK
CLR
Output Q
Q
Load circuit 1
RL
CL
Same as Load Circuit 1.
Notes:
1. Test is put into the each flip-flop.
2. C_L includes probe and jig capacitance.
3. All diodes are 1S2074(H).
Rev.3.00, Jul.22.2005, page 4 of 7