HD74LS73A Datasheet, PDF (4/7 Pages) Hitachi Semiconductor – Dual J-K Flip-Flops(with Clear)

HD74LS73A
Testing Method
Test Circuit
1. ƒ_max, t_PLH, t_PHL, (Clock→Q, Q)
Input 4.5V
V_CC Output Q
P.G.
Zout=50Ω
J
CK
K
CLR
Q
Output Q
Q
Load circuit 1
RL
CL
Same as Load Circuit 1.
Notes:
1. Test is put into the each flip-flop.
2. C_L includes probe and jig capacitance.
3. All diodes are 1S2074(H).
2. t_PHL (Clear→Q), t_PLH (Clear→Q)
V_CC Output Q
P.G.
Zout=50Ω
P.G.
Zout=50Ω
4.5V
Input
Input
J
CK
K
CLR
Q
Output Q
Q
Load circuit 1
RL
CL
Same as Load Circuit 1.
Notes:
1. Test is put into the each flip-flop.
2. C_L includes probe and jig capacitance.
3. All diodes are 1S2074(H).
Rev.3.00, Jul.22.2005, page 4 of 6