HD74LS73A Datasheet, PDF (1/7 Pages) Hitachi Semiconductor – Dual J-K Flip-Flops(with Clear)

HD74LS73A
Dual J-K Flip-Flops (with Clear)
Features
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74LS73AP
DILP-14 pin
PRDP0014AB-B
(DP-14AV)
P
PRSP0014DE-A
HD74LS73ARPEL SOP-14 pin (JEDEC) _(FP-14DNV)
RP
Note: Please consult the sales office for the above package availability.
Pin Arrangement
REJ03D0414–0300
Rev.3.00
Jul.22.2005
Taping Abbreviation
(Quantity)
—
EL (2,500 pcs/reel)
1CK 1
1CLR 2
1K 3
V_CC 4
2CK 5
2CLR 6
2J 7
CLR
J
Q
CK
K
Q
K
Q
CK
J
Q
CLR
(Top view)
14 1J
13 _1Q
12 _1Q
11 _GND
10 _2K
9 _2Q
8 2Q
Function Table
Inputs
Outputs
Clear
Clock
J
K
Q
Q
L
X
X
X
L
H
H
↓
L
L
Q0
Q0
H
↓
H
L
H
L
H
↓
L
H
L
H
H
↓
H
H
Toggle
H
H
X
X
QO
QO
H; high level, L; low level, X; irrelevant, ↓; transition from high to low level,
Q0; level of Q before the indicated steady-state input conditions were established.
Q0; complement of Q0 or level of Q before the indicated steady-state input conditions were established.
Toggle; each output changes to the complement of its previous level on each active transition indicated by ↓.
Rev.3.00, Jul.22.2005, page 1 of 6