HD74HC125 Datasheet, PDF (4/9 Pages) Hitachi Semiconductor – Quad. Bus Buffer Gates (with 3-state outputs)

HD74HC125/HD74HC126
Switching Characteristics (C_L = 50 pF, Input t_r = t_f = 6 ns)
Item
Propagation delay
time
Output enable
Time
Output disable
Time
Output rise/fall
time
Input capacitance
Symbol VCC (V)
tPLH, tPHL 2.0
4.5
6.0
tZH, tZL
2.0
4.5
6.0
tHZ, tLZ
2.0
4.5
6.0
tTLH, tTHL 2.0
4.5
6.0
Cin
—
Ta = 25°C
Ta = –40 to +85°C
Min Typ Max Min Max Unit
— — 100 —
125 ns
— 8 20
—
25
— — 17
—
21
— — 150 —
190 ns
— 9 30
—
38
— — 26
—
33
— — 150 —
190 ns
— 14 30
—
38
— — 26
—
33
— — 60
—
75 ns
— 4 12
—
15
— — 10
—
13
— 5 10
—
10 pF
Test Circuit
V_CC
V_CC
Test Conditions
Input
Pulse generator
Z OUT = 50 Ω
C
Output
A
Y
1 k Ω _S1
C_L = 50 pF
OPEN
*1 See under table
GND
Note: C_L includes the probe and jig capacitance.
TEST
t_PLH /t_PHL
t _ZH/t_HZ
t_ZL /t_LZ
S1
OPEN
GND
V_CC
Rev.2.00, Oct 11, 2005 page 4 of 8