HD74AC74 Datasheet, PDF (4/8 Pages) Hitachi Semiconductor – Dual D-Type Positive Edge-Triggered Flip-Flop

HD74AC74
AC Characteristics
Item
Maximum clock
frequency
Symbol
f_max
V_CC (V)*¹
3.3
5.0
Propagation delay
t_PLH
3.3
C_Dn or S_Dn to Q_n or Q_n
5.0
Propagation delay
t_PHL
3.3
C_Dn or S_Dn to Q_n or Q_n
5.0
Propagation delay
t_PLH
3.3
CP_n to Q_n or Q_n
5.0
Propagation delay
t_PHL
3.3
CP_n to Q_n or Q_n
5.0
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
Ta = +25°C
C_L = 50 pF
Min Typ Max
100 125 —
140 160 —
1.0 8.0 12.0
1.0 6.0 9.0
1.0 10.5 12.0
1.0 8.0 9.5
1.0 8.0 13.5
1.0 6.0 10.0
1.0 8.0 14.0
1.0 6.0 10.0
Ta = –40°C to +85°C
C_L = 50 pF
Min
Max
95
—
125
—
1.0
13.0
1.0
10.0
1.0
13.5
1.0
10.5
1.0
16.0
1.0
10.5
1.0
14.5
1.0
10.5
MHz
ns
ns
ns
ns
Unit
AC Operating Requirements
Ta = –40°C
Ta = +25°C
to +85°C
Item
Set-up time, HIGH or LOW
D_n to CP_n
Hold time, HIGH or LOW
D_n to CP_n
CP_n or C_Dn or S_Dn
Pulse width
C_L = 50 pF
C_L = 50 pF
Symbol V_CC (V)*¹
Typ
Guaranteed Minimum
t_su
3.3
1.5
4.0
4.5
ns
5.0
1.0
3.0
3.0
t_h
3.3
–2.0
0
0
ns
5.0
–1.5
0
0
t_w
3.3
3.0
5.5
7.0
ns
5.0
2.5
4.5
5.0
Recovery time
t_rec
3.3
–2.5
0
0
ns
C_Dn or S_Dn to CP
5.0
–2.0
0
0
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
Unit
Capacitance
Item
Input capacitance
Power dissipation capacitance
Symbol
C_IN
C_PD
Typ
4.5
35.0
Unit
pF
pF
V_CC = 5.5 V
V_CC = 5.0 V
Condition
Rev.2.00, Jul.16.2004, page 4 of 7