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H83802 Datasheet, PDF (348/555 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series
Section 10 Serial Communication Interface 3 (SCI3)
10.6.2 Multiprocessor Serial Data Reception
Figure 10.17 shows a sample flowchart for multiprocessor serial data reception. If the MPIE bit in
SCR3 is set to 1, data is skipped until data with a 1 multiprocessor bit is received. On receiving
data with a 1 multiprocessor bit, the receive data is transferred to RDR. An RXI interrupt request
is generated at this time. All other SCI3 operations are the same as in asynchronous mode. Figure
10.18 shows an example of SCI3 operation for multiprocessor format reception.
Start reception
Set MPIE bit in SCR3 to 1
[1]
Read OER and FER flags in SSR
[2]
Yes
FER+OER = 1
No
Read RDRF flag in SSR
[3]
No
RDRF = 1
Yes
Read receive data in RDR
No
This station’s ID?
Yes
[1] Set the MPIE bit in SCR3 to 1.
[2] Read OER and FER in SSR to check for
errors. Receive error processing is performed
in cases where a receive error occurs.
[3] Read SSR and check that the RDRF flag is
set to 1, then read the receive data in RDR
and compare it with this station’s ID.
If the data is not this station’s ID, set the MPIE
bit to 1 again.
When data is read from RDR, the RDRF flag
is automatically cleared to 0.
[4] Read SSR and check that the RDRF flag is
set to 1, then read the data in RDR.
[5] If a receive error occurs, read the OER and
FER flags in SSR to identify the error. After
performing the appropriate error processing,
ensure that the OER and FER flags are all
cleared to 0.
Reception cannot be resumed if either of
these flags is set to 1.
In the case of a framing error, a break can be
detected by reading the RXD32 pin value.
Read OER and FER flags in SSR
Yes
FER+OER = 1
No
Read RDRF flag in SSR
RDRF = 1
Yes
Read receive data in RDR
[4]
No
[5]
Error processing
(Continued on
next page)
Yes
All data received?
No
[A]
Clear RE bit in SCR3 to 0
<End>
Figure 10.17 Sample Multiprocessor Serial Reception Flowchart (1)
Rev. 6.00 Mar 15, 2005 page 298 of 502
REJ09B0024-0600