UPD78P083GB-3BS-MTX-A Datasheet, PDF (34/58 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCONTROLLER

µPD78P083
(2) Serial Interface (TA = –40 to +85°C, VDD = 1.8 to 5.5 V)
(a) 3-wire serial I/O mode (SCK2 ··· internal clock output)
Parameter
SCK2 cycle time
Symbol
tKCY1
Test Conditions
4.5 V ≤ VDD ≤ 5.5 V
2.7 V ≤ VDD < 4.5 V
2.0 V ≤ VDD < 2.7 V
SCK2 high-/low-level width tKH1,
tKL1
SI2 setup time
tSIK1
(to SCK2 ↑)
VDD = 4.5 to 5.5 V
4.5 V ≤ VDD ≤ 5.5 V
2.7 V ≤ VDD < 4.5 V
2.0 V ≤ VDD < 2.7 V
SI2 hold time
(from SCK2 ↑)
SCK2 ↓ → SO2
output delay time
tKSI1
tKSO1
C = 100 pF^Note
Note C is the SCK2, SO2 output line load capacitance.
MIN.
TYP.
MAX.
Unit
800
ns
1600
ns
3200
ns
4800
ns
tKCY1/2–50
ns
tKCY1/2–100
ns
100
ns
150
ns
300
ns
400
ns
400
ns
300
ns
(b) 3-wire serial I/O mode (SCK2 ··· external clock input)
Parameter
SCK2 cycle time
Symbol
tKCY2
Test Conditions
4.5 V ≤ VDD ≤ 5.5 V
2.7 V ≤ VDD < 4.5 V
2.0 V ≤ VDD < 2.7 V
SCK2 high-/low-level width tKH2,
tKL2
4.5 V ≤ VDD ≤ 5.5 V
2.7 V ≤ VDD < 4.5 V
2.0 V ≤ VDD < 2.7 V
SI2 setup time
(to SCK2 ↑)
SI2 hold time
(from SCK2 ↑)
SCK2 ↓ → SO2
output delay time
SCK2 rise, fall time
tSIK2
VDD = 2.0 to 5.5 V
tKSI2
tKSO2
C = 100 pF^Note
VDD = 2.0 to 5.5 V
tR2,
tF2
MIN.
800
1600
3200
4800
400
800
1600
2400
100
150
400
TYP.
MAX.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
300
ns
500
ns
1000
ns
Note C is the SO2 output line load capacitance.
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