H8S2158 Datasheet, PDF (327/927 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

Section 11 14-Bit PWM Timer (PWMX)
11.3.1 PWM D/A Counter H, L (DACNTH, DACNTL)
DACNT is a 14-bit readable/writable up-counter. The input clock is selected by the clock select bit
(CKS) in DACR. DACNT functions as the time base for both PWM (D/A) channels. When a
channel operates with 14-bit precision, it uses all DACNT bits. When a channel operates with 12-
bit precision, it uses the lower 12 bits and ignores the upper two bits. DACNT cannot be accessed
in 8-bit units. DACNT should always be accessed in 16-bit units. For details, see section 11.4, Bus
Master Interface.
DACNTH
DACNTL
Bit (CPU) : 15 14 13 12 11 10 9
8
76
5
4
3
2
1
0
Bit (counter) : 7
6
5
4
3
2
1
0
8 9 10 11 12 13 ^{ }
 _REGS
DACNTH
Bit Bit Name
7 UC7
to to
0 UC0
Initial Value R/W
All 0
R/W
Description
Upper Up-Counter
DACNTL
Bit Bit Name
7 UC8
to to
2 UC13
1—
0 REGS
Initial Value R/W
All 0
R/W
1
R
1
R/W
Description
Lower Up-Counter
Reserved
This bit is always read as 1 and cannot be modified.
Register Select
DADRA and DACR, and DADRB and DACNT, are
located at the same addresses. The REGS bit specifies
which registers can be accessed.
0: DADRA and DADRB can be accessed
1: DACR and DACNT can be accessed
Rev. 3.00 Jan 25, 2006 page 275 of 872
REJ09B0286-0300