16C6N5 Datasheet, PDF (32/88 Pages) Renesas Technology Corp – Renesas MCU

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M16C/6N Group (M16C/6N5)
5. Electric Characteristics (T/V-ver.)
Table 5.6 A/D Conversion Characteristics ⁽¹⁾
Symbol
Parameter
–
Resolution
Measuring Condition
VREF = VCC
Standard
Unit
Min. Typ. Max.
10 Bit
INL
Integral
10 bits
VREF ANEX0, ANEX1 input, AN0 to AN7 input,
±3 LSB
nonlinearity
= VCC AN0_0 to AN0_7 input, AN2_0 to AN2_7 input
error
= 5 V External operation amp connection mode
±7 LSB
8 bits
VREF = AVCC = VCC = 5 V
±2 LSB
–
Absolute
10 bits
VREF ANEX0, ANEX1 input, AN0 to AN7 input,
±3 LSB
accuracy
= VCC AN0_0 to AN0_7 input, AN2_0 to AN2_7 input
= 5 V External operation amp connection mode
±7 LSB
8 bits
VREF = AVCC = VCC = 5 V
±2 LSB
DNL
Differential nonlinearity error
±1 LSB
–
Offset error
±3 LSB
–
Gain error
±3 LSB
RLADDER Resistor ladder
VREF = VCC
10
40 kΩ
tCONV
10-bit conversion time,
VREF = VCC = 5 V, φAD = 10 MHz
3.3
µs
sample & hold available
8-bit conversion time,
VREF = VCC = 5 V, φAD = 10 MHz
2.8
µs
sample & hold available
tSAMP
Sampling time
0.3
µs
VREF
Reference voltage
2.0
VCC
V
VIA
Analog input voltage
NOTES:
0
VREF
V
1. Referenced to VCC = AVCC = VREF = 4.2 to 5.5 V, VSS = AVSS = 0 V, –40 to 85°C unless otherwise specified.
2. φAD frequency must be 10 MHz or less.
3. When sample & hold is disabled, φAD frequency must be 250kHz or more in addition to a limit of NOTE 2.
When sample & hold is enabled, φAD frequency must be 1MHz or more in addition to a limit of NOTE 2.
Table 5.7 D/A conversion Characteristics ⁽¹⁾
Symbol
Parameter
Measuring condition
Standard
Unit
Min. Typ. Max.
–
Resolution
8 Bits
–
Absolute accuracy
1.0 %
tsu
Setup time
3 µs
RO
Output resistance
4 10 20 kΩ
IVREF
Reference power supply input current
(NOTE 2)
1.5 mA
NOTES:
1. Referenced to VCC = AVCC = VREF = 4.2 to 5.5 V, VSS = AVSS = 0 V, –40 to 85°C unless otherwise specified.
2. This applies when using one D/A converter, with the DAi register (i = 0, 1) for the unused D/A converter set to 00h.
The resistor ladder of the A/D converter is not included. Also, the IVREF will flow even if VREF is disconnected by the
ADCON1 register.
Rev.2.40 Aug 25, 2006 page 32 of 84
REJ03B0004-0240