HD404339 Datasheet, PDF (31/80 Pages) Hitachi Semiconductor – 4-bit HMCS400-Series microcomputer with large-capacity memory

HD404339 Series
System clock selection register 1 (SSR1: $027)
Bit
Initial value
Read/Write
Bit name
3
2
0
0
W
W
SSR13*¹ SSR12
1
0
0
—
W
—
SSR11 Not used
SSR11
0
1
System Clock Selection*²
0.4 to 1.0 MHz
1.6 to 4.5 MHz
SSR12
0
1
32-kHz Oscillation Division
Ratio Selection
f_SUB = f_X/8
f_SUB = f_X/4
SSR13 32-kHz Oscillation Stop
0
Oscillation operates in stop mode
1
Oscillation stops in stop mode
Notes: *1 SSR13 will only be cleared to 0 by a RESET input. A STOPC input during stop mode will not
clear SSR13. Also note that SSR13 will not be cleared upon transition to stop mode.
*2 When the subsystem oscillator (32.768 kHz crystal oscillator) is used, set 0.4 MHz≤ f_OSC ≤ 1.0MHz
or 1.6 MHz ≤ f_OSC ≤ 4.5 MHz.
Figure 20 System Clock Selection Register 1 (SSR1)
System clock selection register 2 (SSR2: $028)
Bit
Initial value
Read/Write
Bit name
3
2
1
—
—
0
—
—
W
Not used Not used SSR21
0
0
W
SSR20
SSR21
0
0
1
1
SSR20
0
1
0
1
System Clock Division Ratio
1/4 division
1/8 division
1/16 division
1/32 division
Figure 21 System Clock Selection Register 2 (SSR2)
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