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R8C27 Datasheet, PDF (300/485 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MCU R8C FAMILY / R8C/2x SERIES
R8C/26 Group, R8C/27 Group
16. Clock Synchronous Serial Interface
Start
SSER register
RE bit ← 0
TE bit ← 0
SSMR2 register SSUMS bit ← 1
(1)
SSMR register Set bits CPHS and CPOS
(1) The MLS bit is set to 0 for MSB-first transfer.
MLS bits ← 0
The clock polarity and phase are set by bits
CPHS and CPOS.
SSCRH register
Set MSS bit
SSMR2 register SCKS bit ← 1
(2) Set the BIDE bit to 1 in bidirectional mode and
(2)
Set bits SOOS, CSS0 to
CSS1, and BIDE
set the I/O of the SCS pin by bits CSS0 and
CSS1.
SSCRH register Set bits CKS0 to CKS2
Set RSSTP bit
SSSR register
ORER bit ← 0(1)
SSER register
RE bit ← 1 (receive)
TE bit ← 1 (transmit)
Set bits RIE, TEIE, and TIE
End
NOTE:
1. Write 0 after reading 1 to set the ORER bit to 0.
Figure 16.18 Initialization in 4-Wire Bus Communication Mode
Rev.2.10 Sep 26, 2008 Page 283 of 453
REJ09B0278-0210