RJE0616JSP_15 Datasheet, PDF (3/8 Pages) Renesas Technology Corp – -60V, -4A Silicon P Channel Thermal FET Power Switching

RJE0616JSP
Main Characteristics
Power vs. Temperature Derating
4.0
Test condition.
When using the glass epoxy board.
(FR4 40 x 40 x 1.6 mm), (PW ≤ 10s)
3.0
2.0
1.0
0
0
50
100
150
200
Ambient Temperature Ta (°C)
Typical Output Characteristics
−4 ^{−10 V}
−7 V
−6 V
−3 _{−5 V}
−4.4 V
−4.8 V
−2
−4.6 V
−4.2 V
V_GS = −4 V
−1
Pulse Test
0
−2 −4 −6 −8 −10
Drain to Source Voltage V_DS (V)
Drain Source Saturation Voltage vs.
Gate to Source Voltage
−1000
Pulse Test
−800
−600
−400
−200
I_D = −2 A
−1 A
−0.5 A
−0
−2 −4 −6 −8 −10 −12 −14 −16
Gate to Source Voltage V_GS (V)
REJ03G1944-0100 Rev.1.00
Jul 01, 2010
Preliminary
Maximum Safe Operation Area
100
Ta = 25°C
Thermal shut down operation area
10
1 _ms
PW
1
= _{10 ms}
0.1
Operation
in this area
is limited R_DS(on)
0.01
−0.01 −0.1
−1
−10 −100
Drain to Source Voltage V_DS (V)
Note 7:
When using the glass epoxy board.
(FR4 40 x 40 x 1.6 mm)
Typical Transfer Characteristics
−4
V_DS = −10 V
Pulse Test
−3
Tc = 150°C
−2
−1
25°C
−40°C
0
−2 −4 −6 −8 −10
Gate to Source Voltage V_GS (V)
Static Drain to Source On State Resistance
vs. Drain Current
1000
Pulse Test
V_GS = −6 V
100
−10 V
10
−0.1
−1
−10
Drain Current I_D (A)
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