R8C2E Datasheet, PDF (231/354 Pages) Renesas Technology Corp – MCU

R8C/2E Group, R8C/2F Group
15. Serial Interface
• Example of transmit timing (when internal clock is selected)
TC
Transfer clock
TE bit in U0C1 1
register
0
TI bit in U0C1 1
register
0
CLK0
Set data in U0TB register
Transfer from U0TB register to UART0 transmit register
TCLK
Stop pulsing because the TE bit is set to 0
TXD0
D0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D6 D7
D0 D1 D2 D3 D4 D5 D6 D7
TXEPT bit in 1
U0C0 register ₀
IR bit in S0TIC 1
register
0
Set to 0 when interrupt request is acknowledged, or set by a program
TC = TCLK = 2(n+1)/fi
fi: Frequency of U0BRG count source (f1, f8, f32)
The above applies under the following settings:
n: Setting value to U0BRG register
• CKDIR bit in U0MR register = 0 (internal clock)
• CKPOL bit in U0C0 register = 0 (output transmit data at the falling edge and input receive data at the rising edge of the transfer clock)
• U0IRS bit in U0C1 register = 0 (an interrupt request is generated when the transmit buffer is empty)
• Example of receive timing (when external clock is selected)
RE bit in U0C1 1
register
0
TE bit in U0C1 1
register
0
TI bit in U0C1 1
register
0
CLK0
RXD0
RI bit in U0C1 ₁
register
0
Write dummy data to U0TB register
Transfer from U0TB register to UART0 transmit register
1/fEXT
Receive data is taken in
D0 D1 D2 D3 D4 D5 D6 D7
D0 D1 D2 D3 D4 D5
Transfer from UART0 receive register to
U0RB register
Read out from U0RB register
IR bit in S0RIC 1
register
0
Set to 0 when interrupt request is acknowledged, or set by a program
The above applies under the following settings:
• CKDIR bit in U0MR register = 1 (external clock)
• CKPOL bit in U0C0 register = 0 (output transmit data at the falling edge and input receive data at the rising edge of the transfer clock)
The following conditions are met when “H” is applied to the CLK0 pin before receiving data:
• TE bit in U0C1 register = 1 (enables transmit)
• RE bit in U0C1 register = 1 (enables receive)
• Write dummy data to the U0TB register
fEXT: Frequency of external clock
Figure 15.8 Transmit and Receive Timing Example in Clock Synchronous Serial I/O Mode
Rev.1.00 Dec 14, 2007 Page 215 of 332
REJ09B0349-0100