7643 Datasheet, PDF (23/121 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

7643 Group
Key Input Interrupt (Key-on Wake-Up)
A key input interrupt request is generated by applying “L” level to any
pin of port P2 that have been set to input mode. In other words, it is
generated when AND of input level goes from “1” to “0”. An example
of using a key input interrupt is shown in Figure 18, where an inter-
rupt request is generated by pressing one of the keys consisted as
an active-low key matrix which inputs to ports P20–P24.
Port PXx
“L” level output
P27 output
P26 output
P25 output
P24 input
P23 input
P22 input
P21 input
P20 input
Port P2 pull-up control register
Bit 7 = “0”
Port P27
✻
✻✻
direction register = “1”
Port P27
latch
Falling edge
detector
Port P2 pull-up control register
Bit 6 = “0”
Port P26
✻
✻✻
direction register = “1”
Port P26
latch
Falling edge
detector
Port P2 pull-up control register
Bit 5 = “0”
Port P25
✻
✻✻
direction register = “1”
Port P25
latch
Falling edge
detector
Port P2 pull-up control register
Bit 4 = “0”
Port P24
✻
✻✻
direction register = “0”
Port P24
latch
Falling edge
detector
Port P2 pull-up control register
Bit 3 = “0”
Port P23
✻
✻✻
direction register = “0”
Port P23
latch
Falling edge
detector
Port P2 pull-up control register
Bit 2 = “0”
Port P22
✻
✻✻
direction register = “0”
Port P22
latch
Falling edge
detector
Port P2 pull-up control register
Bit 1 = “0”
Port P21
✻
✻✻
direction register = “0”
Port P21
latch
Falling edge
detector
Port P2 pull-up control register
Bit 0 = “0”
Port P20
✻
✻✻
direction register = “0”
Port P20
latch
Falling edge
detector
Key input interrupt request
Port P2
Input reading circuit
✻ P-channel transistor for pull-up
✻✻ CMOS output buffer
Fig. 18 Connection example when using key input interrupt and port P2 block diagram
Rev.2.00 Aug 28, 2006 page 23 of 119
REJ03B0054-0200