R1EX24064ASAS0A_15 Datasheet, PDF (22/26 Pages) Renesas Technology Corp – Two-wire serial interface 64k EEPROM (8-kword × 8-bit)

R1EX24064AxxS0A
Notes
Data Protection at V_CC On/Off
When V_CC is turned on or off, noise on the SCL and SDA inputs generated by external circuits (CPU, etc)
may act as a trigger and turn the EEPROM to unintentional program mode. To prevent this unintentional
programming, this EEPROM has a power on reset function. Be careful of the notices described below in
order for the power on reset function to operate correctly.
• SCL and SDA should be fixed to V_CC or V_SS during V_CC on/off. Low to high or high to low transition
during V_CC on/off may cause the trigger for the unintentional programming.
• V_CC should be turned off after the EEPROM is placed in a standby state.
• V_CC should be turned on from the ground level(V_SS) in order for the EEPROM not to enter the
unintentional programming mode.
• V_CC turn on rate should be longer than 2 µs/V.
Noise Suppression Time
This EEPROM have a noise suppression function at SCL and SDA inputs, that cut noise of width less than
50 ns. Be careful not to allow noise of width more than 50 ns.
REJ03C0332-0200 Rev.2.00 Oct. 26, 2009
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