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3804H_M Datasheet, PDF (212/387 Pages) Renesas Technology Corp – 8-BIT CISC SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 38000 SERIES
3804 Group (Spec.H)
APPLICATION
2.5 Multi-master I2C-BUS interface
I2C control register
b7 b6 b5 b4 b3 b2 b1 b0
I2C control register
(S1D: address 001416)
b
Name
Functions
At reset R W
0 Bit counter
b2b1b0
0
(Number of
0 0 0: 8
transmit/receive 0 0 1: 7
1 bits)
0 1 0: 6
0
(BC0, BC1, BC2) 0 1 1: 5
1 0 0: 4
2
1 0 1: 3
1 1 0: 2
0
1 1 1: 1
3 I2C-BUS interface 0: Disabled
0
enable bit (ES0) 1: Enabled
4 Data format
0: Addressing format
0
selection bit (ALS) 1: Free data format
5 Addressing format 0: 7-bit addressing format
0
selection bit
1: 10-bit addressing format
(10BIT SAD)
6 Nothing is arranged for this bit. This is a write
0
✕
disabled bit. When this bit is read out, the
contents are 0 .
7 I2C-BUS interface pin 0: SMBUS input
0
input level selection 1: CMOS input
bit (TISS)
Note: Do not use the read-modify-write instruction because some bits
change by hardware when the start condition is detected and
the byte-transfer is completed.
Fig. 2.5.6 Structure of I2C control register
Rev.1.00 Jan 14, 2005
REJ09B0212-0100Z
2-88