3804H_M Datasheet, PDF (167/387 Pages) Renesas Technology Corp – 8-BIT CISC SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 38000 SERIES

3804 Group (Spec.H)
APPLICATION
2.3 Timer
RESET
q x: This bit is not used here. Set it to “0” or “1” arbitrarily.
Initialization
SEI
•All interrupts disabled
P4D (address 000916) ^0XXXXXXX2
TZM (address 002A16) X10X00112
TYZCSS (address 000F16) 0011XXXX2
TZL (address 002816) FF16
TZH (address 002916) FF16
INTSEL (address 003916) XXX1XXX12
IREQ1 (address 003C16), bit0 0
ICON1 (address 003E16), bit0 1
IREQ2 (address 003D16), bit5 0
ICON2 (address 003F16), bit5 1
TZM (address 002A16), bit6 0
CLI
•Set P47/CNTR2 pin to input mode
•Timer Z: Pulse width measurement mode
(Measure “H” level of pulses input from CNTR2 pin.)
•Set timer Z initial value
•Timer Z interrupt enabled
•CNTR2 interrupt enabled
•Timer Z count start
•Interrupts enabled
Timer Z interrupt process routine
CLT (Note 1)
CLD (Note 2)
Push registers to stack
Error processing
Pop registers
Note 1: When using Index X mode flag (T)
Note 2: When using Decimal mode flag (D)
•Push registers used in interrupt process routine
•Pop registers pushed to stack
RTI
Note: Timer Z interrupt also occurs owing to factors other than measurement level.
(CNTR2 input =“L” in this application)
Process it by software as error processing is performed for measurement level as necessary.
(CNTR2 input level can be checked by reading the contents of sharing port P47 register.)
Fig. 2.3.27 Control procedure (1)
Rev.1.00 Jan 14, 2005
REJ09B0212-0100Z
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