THS7375 Datasheet, PDF (21/36 Pages) Texas Instruments – 4-Channel SDTV Video Amplifier with 6th-Order Filters and 5.6-V/V Gain

THS7375
www.ti.com......................................................................................................................................................................................... SBOS449 – SEPTEMBER 2008
discharge current. If more hum rejection is desired or
there is a loss of sync occurring, simply decrease the
0.1-µF input coupling capacitor. A decrease from 0.1
µF to 0.047 µF increases the hum rejection by a
factor of 2:1. Alternatively, an external pull-down
resistor to ground may be added that decreases the
overall resistance and ultimately increases the
discharge current.
To ensure proper stability of the ac STC control loop,
the source impedance must be less than 1 kΩ with
the input capacitor in place. Otherwise, there is a
possibility for the control loop to ring; this ringing may
appear on the THS7375 output. Because most DACs
or encoders use resistors to establish the voltage,
which are typically less than 500 Ω, meeting the less
than 1-kΩ requirement is easily done. However, if the
source impedance looking from the THS7375 input
perspective is very high, simply adding a 1-kΩ
resistor to GND ensures proper operation of the
THS7375.
INPUT MODE OF OPERATION: AC BIAS
Sync-tip clamps are ideal for signals that have
horizontal and/or vertical syncs associated with them.
However, some video signals do not have a sync
embedded within the signal. If ac-coupling of these
signals is desired, then a dc bias is required to
properly set the dc operating point within the
THS7375. This function is easily accomplished with
the THS7375 by simply adding an external pull-up
resistor to the positive power supply, as shown in
Figure 49.
+3.3 V
Input
C_IN
0.1 mF
R_PU
Input
Pin
+3.3 V
800 kW
Internal
Circuitry
Level
Shift
Figure 49. AC-Bias Input Mode Circuit
Configuration
The dc voltage that appears at the input pin is equal
to Equation 1:
V_DC = V_S
800 kW
800 kW + R_PU
(1)
The THS7375 allowable input range is approximately
(V_S+ – 1.5 V), which allows for a very wide input
voltage range but is limited by the allowable output
voltage range and the internal gain. As such, the
input dc bias point is very flexible; the output dc bias
point is the primary factor. For example, if the output
dc bias point is desired to be 1.6 V on a 3.3-V supply,
then the input dc bias point is recommended to be
(1.6 V – 320 mV)/5.6 = 0.228 V. Thus, the pull-up
resistor calculates to approximately 10.8 MΩ. If the
output dc-bias point is desired to be 1.6 V with a 5-V
power supply, then the value calculates to be
approximately 16.7 MΩ.
Keep in mind that the internal 800-kΩ resistor has a
±20% variance. As such, the calculations should take
this variance into account. For the 0.228-V input bias
voltage example above using an ideal 10.8-MΩ
resistor, the input dc bias voltage is about 0.228 V
(±0.045 V) which translates to an output bias voltage
of about 1.6 V (±0.25 V).
If desired, an external resistor can be placed in
parallel with the internal 800-kΩ resistor. This
external resistor may be required if the pull-up
resistor calculates to a value higher than desired.
There are no consequences of this configuration
other than decreasing the effective input impedance
of the THS7375 system.
The value of the output bias voltage is very flexible
and is left to each individual design. It is important to
ensure that the signal does not clip or saturate the
video signal. Thus, it is recommended to ensure the
output bias voltage is between 0.9 V and (V_S+ – 1 V).
For 100% color saturated CVBS or signals with
Macrovision, the CVBS signal can reach up to 1.23
V_PP at the input, or 2.46 V_PP at the output of the
THS7375. In contrast, other signals are typically 1
V_PP or 0.7 V_PP at the input which translate to an
output voltage of 2 V_PP or 1.4 V_PP, respectively. The
output bias voltage must account for a worst-case
situation depending on the signals involved.
One other issue that must be taken into account is
the dc-bias point as a function of the power supply.
As such, there is an impact on the system PSRR. To
help reduce this impact, the input capacitor combines
with the pull-up resistance to function as a low-pass
filter. Additionally, the time to charge the capacitor to
the final dc bias point is also a function of the pull-up
resistor and the input capacitor. Lastly, the input
capacitor forms a high-pass filter with the parallel
impedance of the pull-up resistor and the 800-kΩ
resistor. In general, it is good to have this high-pass
filter at approximately 3-Hz to minimize any potential
droop on a P’_B, P’_R, or non-sync B’ or R’ signal. A
0.1-µF input capacitor with a 10.8-MΩ pull-up resistor
equates to a 2.1-Hz high-pass corner frequency.
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): THS7375
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