THS7375 Datasheet, PDF(19/36 Page) Texas Instruments – 4-Channel SDTV Video Amplifier with 6th-Order Filters and 5.6-V/V Gain

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THS7375

www.ti.com......................................................................................................................................................................................... SBOS449 â SEPTEMBER 2008

INPUT MODE OF OPERATION: DC

The THS7375 allows for both ac-coupled and

dc-coupled inputs. Many DACs or video encoders can

be dc-connected to the THS7375. One of the

drawbacks to dc coupling, however, is when 0 V is

applied to the input. Although the input of the

THS7375 allows for a 0-V input signal with no issues,

the output swing of a traditional amplifier cannot yield

a 0-V signal, resulting in possible clipping. This

condition is true for any single-supply amplifier as a

result of output transistor limitations. Both CMOS and

bipolar transistors cannot go to 0 V while sinking

current. This characterization of a transistor is also

the same reason why the highest output voltage is

always less than the power-supply voltage when

sourcing current.

This output clipping can reduce the sync amplitudes

(both horizontal and vertical sync) on the video

signal. A problem occurs if the receiver of this video

signal uses an AGC loop to account for losses in the

transmission line. Some video AGC circuits derive

gain from the horizontal sync amplitude. If clipping

occurs on the sync amplitude, then the AGC circuit

can increase the gain too muchâresulting in too

much luma and/or chroma amplitude gain correction.

This overcorrection may result in a picture with an

overly bright display with too much color saturation.

Other AGC circuits use the chroma burst amplitude

for amplitude control, and a reduction in the sync

signals does not alter the proper gain setting.

However, it is good engineering design practice to

ensure that saturation/clipping does not take place.

Transistors always take a finite amount of time to

come out of saturation. This saturation could possibly

result in timing delays or other aberrations on the

signals.

To eliminate saturation/clipping problems, the

THS7375 has a 320-mV output level shift feature.

This feature takes the input voltage and adds an

internal shift to the signal. The THS7375 rail-to-rail

output stage can create this output level while

connected to a typical video load. This feature

ensures that no saturation/clipping of the sync signals

occur. This shift is constant, regardless of the input

signal. For example, if a 0.4-V input is applied, the

output is at (0.4 V Ã 5.6 V/V) + 0.32 V = 2.56 V.

Because the internal gain is fixed at 5.6 V/V (+14.95

dB), the gain dictates what the allowable linear input

voltage range can be without clipping concerns. For

example, if the power supply is set to 3.3 V, the

maximum output is approximately 3.15 V while driving

a significant amount of current. Thus, to avoid

clipping, the allowable input is [(3.2 V â 0.32 V) / 5.6

V/V] = 0.51 V. This calculation is true for up to the

maximum recommended 5-V power supply that

allows approximately a [(4.9 V â 0.32 V) / 5.6 V/V] =

0.818 V input range while avoiding clipping on the

output.

The input impedance of the THS7375 in this mode of

operation is dictated by the internal 800-kâ¦ pull-down

resistor, as shown in Figure 47. Note that the internal

voltage shift does not appear at the input pin, but only

the output pin.

+VS

Input

800 kW

Internal

Circuitry

Level

Shift

Figure 47. Equivalent DC Input Mode Circuit

INPUT MODE OF OPERATION: AC SYNC-TIP

CLAMP

Some video DACs or encoders are not referenced to

ground but rather to the positive power supply. The

resulting video signals are generally at too high of a

voltage for a dc-coupled video buffer to function

properly. To account for this scenario, the THS7375

incorporates a sync-tip clamp (STC) circuit. This

function requires a capacitor (nominally 0.1 ÂµF) to be

in series with the input. Note that while the term

sync-tip clamp is used throughout this document, it

should be noted that the THS7375 would probably be

better termed to be a dc restoration circuit based on

how this function is performed. This circuit is an

active clamp circuit and not a passive diode clamp

function.

The input to the THS7375 has an internal control loop

that sets the lowest input applied voltage to clamp at

ground (0 V). By setting the reference at 0 V, the

THS7375 allows a dc-coupled input to also function.

Therefore, the STC is considered transparent

because it does not operate unless the input signal

goes below ground. The signal then goes through the

same level shifter, resulting in an output voltage low

level of 320 mV. If the input signal tries to go below 0

V, the internal control loop of the THS7375 sources

Product Folder Link(s): THS7375

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