3826OTP Datasheet, PDF (21/91 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

3826 Group (One Time PROM version)
(18) Port P61
P61/SOUT2 P-channel output disable bit
Serial I/O2 transmit end signal
Serial I/O2 synchronous clock selection bit
Serial I/O2 port selection bit
Direction
register
Data bus
Port latch
Pull-up control
(19) Port P62
Serial I/O2 synchronous clock
selection bit
Serial I/O2 port selection bit
Synchronous clock output pin
selection bit
Direction
register
Data bus
Port latch
Pull-up control
Serial I/O2 output
A/D converter input
Analog input pin selection bit
(20) Port P63
Serial I/O2 synchronous clock selection bit
Serial I/O2 port selection bit
Synchronous clock output pin selection
bit
Direction
register
Data bus
Port latch
Pull-up control
Serial I/O2 clock output
Serial I/O2 clock input
A/D converter input
Analog input pin selection bit
(21) COM0–COM3
VL3
VL2
VL1
The gate input signal of each
transistor is controlled by the LCD
duty ratio and the bias value.
Serial I/O2 clock output
VSS
A/D converter input
Analog input pin selection bit
(22) SEG0–SEG17
(23) Port P70
VL2/VL3
VL1/VSS
The voltage applied to the sources of P-
channel and N-channel transistors is the
controlled voltage by the bias value.
Data bus
INT0 input
Fig. 17 Port block diagram (4)
Rev.1.00 Sep 06, 2006 page 21 of 88
REJ03B0181-0100