2SK1772 Datasheet, PDF (2/7 Pages) Hitachi Semiconductor – Silicon N-Channel MOS FET

2SK1772
Absolute Maximum Ratings
Item
Symbol
Drain to source voltage
VDSS
Gate to source voltage
VGSS
Drain current
Drain peak current
ID
ID(pulse)*1
Body to drain diode reverse drain current
Channel dissipation
IDR
Pch^*2
Channel temperature
Tch
Storage temperature
Tstg
Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1 %
2. When using the alumina ceramic board (12.5 × 20 × 0.7mm)
Ratings
30
±20
1
2
1
1
150
–55 to +150
(Ta = 25°C)
Unit
V
V
A
A
A
W
°C
°C
Electrical Characteristics
(Ta = 25°C)
Item
Symbol Min
Typ
Max
Unit
Test Conditions
Drain to source breakdown voltage V(BR)DSS
30
—
—
V ID = 10 mA, VGS = 0
Gate to source breakdown voltage V(BR)GSS ±20
—
—
V IG = ±100 µA, VDS = 0
Gate to source leak current
IGSS
—
—
±10
µA VGS = ±16 V, VDS = 0
Zero gate voltage drain current
IDSS
—
—
50
µA VDS = 25 V, VGS = 0
Gate to source cutoff voltage
Static drain to source on state
resistance
Forward transfer admittance
VGS(off)
1.0
RDS(on)
—
—
|yfs|
0.6
—
2.0
0.4
0.6
0.6
0.85
1.0
—
V ID = 1 mA, VDS = 10 V
Ω ID = 0.5 A, VGS = 10 V*³
Ω
ID = 0.5 A, VGS = 4 V*³
S
ID = 0.5 A, VDS = 10 V*³
Input capacitance
Ciss
—
85
—
pF VDS = 10 V, VGS = 0,
Output capacitance
Coss
—
65
—
pF ^{f = 1 MHz}
Reverse transfer capacitance
Crss
—
20
—
pF
Turn-on delay time
Rise time
td(on)
—
10
—
ns ID = 0.5 A, VGS = 10 V,
tr
—
15
—
ns ^RL ^{= 60 Ω*3}
Turn-off delay time
td(off)
—
40
—
ns
Fall time
tf
—
30
—
ns
Body to drain diode forward voltage VDF
—
1.2
—
V
IF = 1 A, VGS = 0*³
Body to drain diode reverse
recovery time
trr
—
30
—
ns IF = 1 A, VGS = 0,
diF/dt = 50 A/µs*³
Note: 3. Pulse Test
Rev.2.00 Sep 07, 2005 page 2 of 6