YRDKRX62N Datasheet, PDF (18/43 Pages) Renesas Technology Corp – Renesas Demonstration Kit (RDK) for RX62N User’s Manual: Hardware

Mode No.
USB Host
USB Function / device/ slave
USB On the Go (OTG)
USB DIP Switch Settings (SW6)
SW6.1
SW6.2
OFF
OFF
ON
OFF
OFF
ON
SW6.3
ON
OFF
OFF
Table 6-7: USB DIP Switch SW6 settings
SW6.4
OFF
ON
OFF
6.10. Ethernet
The Ethernet module conforms to the Ethernet or IEEE802.3 media access control (MAC) standard. Ethernet controller is connected to the
direct memory access controller for Ethernet controller (E-DMAC) and carries out high-speed data transfer to and from the memory. In addition,
Ethernet controller is connected to DP83640 physical receiver chip enabling it to perform transmission and reception of Ethernet frames.
Note that the chip is configured in Reduced Pin-count mode (RMII).
The Ethernet PHY is configured at power-on reset for Auto-Negotiation, advertising 10Base-T and 100Base-TX in both full and half-duplex
modes. Each unit is pre-programmed with a unique IEEE assigned MAC address ranging from 00:30:55:08:00:01 to 00:30:55:08:FF:FF. If
there is a problem with the pre-programmed MAC address, the demonstration code will default to 00:30:55:08:00:00. The MAC address
programmed into the part at the factory is shown on the back of the board. The MAC address is stored at the end of data block 15 at memory
address 0x107FF0.
Table 6-8 contains details of the signal descriptions and pin connections. All connections to the MCU are direct.
Net Name
ETH_CLK
TX_EN
RMII_TXD0
RMII_TXD1
RMII_MAS
RX_ER
RMII_RXD0
RMII_RXD1
CRS
MDC
MDIO
ETH-IRQ
Function
Transmit/Receive Clock
Transmit Enable
Transmit Data, Bit 1
Transmit Data, Bit 2
Master Mode (high)
Receive Error
Receive Data, Bit 1
Receive Data, Bit 2
Carrier Sense
Management Data Clock
Management data I/O
IEEE1588 signaling pin
MCU Pin
Number
58
56
55
54
NC
57
59
61
53
66
67
98
Table 6-8: Ethernet Module Connections
14