H8S2245 Datasheet, PDF (171/818 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series

Section 5 Interrupt Controller
5.6.2 Block Diagram
Figure 5.10 shows a block diagram of the DTC and interrupt controller.
Interrupt
request
IRQ
interrupt
Interrupt source
On-chip
clear signal
supporting
module
Selection
circuit
Select
signal
Clear signal
DTCER
DTVECR
SWDTE
clear signal
Control logic
Interrupt controller
Determination of
priority
DTC activation
request vector
number
Clear signal
DTC
CPU interrupt
request vector
number
I, UI
CPU
Figure 5.10 Interrupt Control for DTC
5.6.3 Operation
The interrupt controller has three main functions in DTC control.
(1) Selection of Interrupt Source
Interrupt sources can be specified as DTC activation requests or CPU interrupt requests by means
of the DTCE bit of DTCEA to DTCEF in the DTC.
After a DTC data transfer, the DTCE bit can be cleared to 0 and an interrupt request sent to the
CPU in accordance with the specification of the DISEL bit of MRB in the DTC.
When the DTC has performed the specified number of data transfers and the transfer counter value
is zero, the DTCE bit is cleared to 0 and an interrupt request is sent to the CPU after the DTC data
transfer.
Rev.3.00 Mar. 26, 2007 Page 129 of 772
REJ09B0355-0300