R32C-117A Datasheet, PDF (15/118 Pages) Renesas Technology Corp – R32C/100 Series CPU Core

R32C/117A Group
(Note 1)
(Note 2)
1. Overview
IIO0_0 / IIO1_0 / D8 / P1_0
109
AN0_7 / D7 / P0_7
110
AN0_6 / D6 / P0_6
111
AN0_5 / D5 / P0_5
112
AN0_4 / D4 / P0_4
113
WR3 / BC3 / P11_4
114
IIO1_3 / CTS8 / RTS8 / WR2 / CS3 / P11_3
115
IIO1_2 / RXD8 / CS2 / P11_2
116
IIO1_1 / CLK8 / CS1 / P11_1
117
IIO1_0 / TXD8 / CS0 / P11_0
118
AN0_3 / D3 / P0_3
119
AN0_2 / D2 / P0_2
120
AN0_1 / D1 / P0_1
121
AN0_0 / D0 / P0_0
122
IIO0_7 / CTS6 / RTS6 / SS6 / AN15_7 / P15_7
123
IIO0_6 / CLK6 / AN15_6 / P15_6
124
IIO0_5 / RXD6 / SCL6 / STXD6 / AN15_5 / P15_5
125
IIO0_4 / TXD6 / SDA6 / SRXD6 / AN15_4 / P15_4
126
IIO0_3 / CTS7 / RTS7 / AN15_3 / P15_3
127
IIO0_2 / RXD7 / AN15_2 / P15_2
128
IIO0_1 / CLK7 / AN15_1 / P15_1
129
VSS
130
IIO0_0 / TXD7 / AN15_0 / P15_0
131
VCC
132
KI3 / AN_7 / P10_7
133
KI2 / AN_6 / P10_6
134
KI1 / AN_5 / P10_5
135
KI0 / AN_4 / P10_4
136
AN_3 / P10_3
137
AN_2 / P10_2
138
AN_1 / P10_1
139
AVSS
140
AN_0 / P10_0
141
VREF
142
AVCC
143
RXD4 / SCL4 / STXD4 / ADTRG / P9_7
144
(Note 3)
R32C/117A GROUP
PLQP0144KA-A
(144P6Q-A)
(Top view)
72
P4_4 / CS3 / A20 / CTS6 / RTS6 / SS6
71
P4_5 / CS2 / A21 / CLK6
70
P4_6 / CS1 / A22 / RXD6 / SCL6 / STXD6
69
P4_7 / CS0 / A23 / TXD6 / SDA6 / SRXD6
68
P12_5 / D21
67
P12_6 / D22
66
P12_7 / D23
65
P5_0 / WR0 / WR
64
P5_1 / WR1 / BC1
63
P5_2 / RD
62
P5_3 / CLKOUT / BCLK
61
P13_0 / D24 / OUTC2_4
60
P13_1 / D25 / OUTC2_5
59
VCC
58
P13_2 / D26 / OUTC2_6
57
VSS
56
P13_3 / D27 / OUTC2_3
55
P5_4 / HLDA / CS1 / TXD7
54
P5_5 / HOLD / CLK7
(Note 2)
53
P5_6 / ALE / CS2 / RXD7
52
P5_7 / RDY / CS3 / CTS7 / RTS7
51
P13_4 / D28 / OUTC2_0 / ISTXD2 / IEOUT
50
P13_5 / D29 / OUTC2_2 / ISRXD2 / IEIN
49
P13_6 / D30 / OUTC2_1 / ISCLK2
48
P13_7 / D31 / OUTC2_7
47
P6_0 / TB0IN / CTS0 / RTS0 / SS0
46
P6_1 / TB1IN / CLK0
45
P6_2 / TB2IN / RXD0 / SCL0 / STXD0
44
P6_3 / TXD0 / SDA0 / SRXD0
43
P6_4 / CTS1 / RTS1 / SS1 / OUTC2_1 / ISCLK2
42
P6_5 / CLK1
41
P11_7
40
P6_6 / RXD1 / SCL1 / STXD1
39
P14_7
38
P6_7 / TXD1 / SDA1 / SRXD1
37
P7_0 / TA0OUT / TXD2 / SDA2 / SRXD2 / IIO1_6 / OUTC2_0 / ISTXD2 / IEOUT / MSDA
(Note 2)
Notes:
1. Pin names in brackets [ ] represent a functional signal as a whole and should not be considered as two separate pins.
2. The following pins are 5 V tolerant inputs: P4_0 to P4_7, P5_4 to P5_7, P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_3, P12_0 to P12_7.
3. The position of pin number 1 varies by product. Refer to the index mark in attached “Package Dimensions”.
Figure 1.4 Pin Assignment for the 144-pin Package (top view)
R01DS0067EJ0120 Rev.1.20
Dec 10, 2014
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