32171 Datasheet, PDF (14/772 Pages) Renesas Technology Corp – 32-BIT RISC SINGLE-CHIP MICROCOMPUTER M32R FAMILY / M32R/ECU SERIES

4.10 Trap Processing ............................................................................................ 4-20
4.10.1 Trap (TRAP) ................................................................................ 4-20
4.11 EIT Priority Levels ......................................................................................... 4-22
4.12 Example of EIT Processing .......................................................................... 4-23
4.13 Precautions on EIT ....................................................................................... 4-25
CHAPTER 5 INTERRUPT CONTROLLER (ICU)
5.1 Outline of the Interrupt Controller (ICU) ......................................................... 5-2
5.2 ICU Related Registers ...................................................................................... 5-4
5.2.1 Interrupt Vector Register .................................................................. 5-5
5.2.2 Interrupt Mask Register ................................................................... 5-6
5.2.3 SBI (System Break Interrupt) Control Register ................................ 5-7
5.2.4 Interrupt Control Registers ............................................................... 5-8
5.3 Interrupt Sources in Internal Peripheral I/O ................................................. 5-12
5.4 ICU Vector Table ............................................................................................. 5-13
5.5 Description of Interrupt Operation ................................................................ 5-16
5.5.1 Acceptance of Internal Peripheral I/O Interrupts ............................ 5-16
5.5.2 Processing of Internal Peripheral I/O Interrupts by Handlers ........ 5-19
5.6 Description of System Break Interrupt (SBI) Operation .............................. 5-22
5.6.1 Acceptance of SBI ......................................................................... 5-22
5.6.2 SBI Processing by Handler ............................................................ 5-22
CHAPTER 6 INTERNAL MEMORY
6.1 Outline of the Internal Memory ........................................................................ 6-2
6.2 Internal RAM ...................................................................................................... 6-2
6.3 Internal Flash Memory ...................................................................................... 6-3
6.4 Registers Associated with the Internal Flash Memory .................................. 6-3
6.4.1 Flash Mode Register ........................................................................ 6-4
6.4.2 Flash Status Registers ..................................................................... 6-5
6.4.3 Flash Control Registers ................................................................... 6-8
6.4.4 Virtual Flash L Bank Register ........................................................ 6-14
6.4.5 Virtual Flash S Bank Registers ...................................................... 6-15
(3)