M16C Datasheet, PDF (11/39 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/26 Group
3. Memory
3. Memory
Figure 3.1 is a memory map of the M16C/26 group. The address space extends the 1M bytes from address
0000016 to FFFFF16.
The internal ROM is allocated in a lower address direction beginning with address FFFFF16. For example,
a 32-Kbyte internal ROM is allocated to the addresses from F800016 to FFFFF16.
The fixed interrupt vector table is allocated to the addresses from FFFDC16 to FFFFF16. Therefore, store
the start address of each interrupt routine here.
The internal RAM is allocated in an upper address direction beginning with address 0040016. For example,
a 1-Kbytes internal RAM is allocated to the addresses from 0040016 to 007FF16. In addition to storing data,
the internal RAM also stores the stack used when calling subroutines and when interrupts are generated.
The SRF is allocated to the addresses from 0000016 to 003FF16. Peripheral function control registers are
located here. Of the SFR, any area which has no functions allocated is reserved for future use and cannot
be used by users.
The special page vector table is allocated to the addresses from FFE0016 to FFFDB16. This vector is used
by the JMPS or JSRS instruction. For details, refer to the “M16C/60 and M16C/20 Series Software Manual.”
0000016
0040016
Internal RAM
Size
Address XXXXX16
1K bytes
007FF16
2K bytes
00BFF16
Internal ROM
Size
Address YYYYY16
24K bytes
FA00016
32K bytes
F800016
48K bytes
64K bytes
F400016
F000016
XXXXX16
0F00016
0FFFF16
SFR
Internal RAM
Reserved area
Internal ROM
(Data area)^{(Note 1)}
Reserved area
YYYYY16
FFFFF16
Internal ROM
(Program area)
Note 1: Shown here is a Block A (2K bytes) and Block B (2K bytes).
Figure 3.1. Memory Map
FFE0016
Special page
vector table
FFFDC16
FFFFF16
Undefined instruction
Overflow
BRK instruction
Address match
Single step
Watchdog timer
DBC
NMI
Reset
Rev.1.00 2004.6.10 page 11 of 37
REJ09B0176-0100Z