PD16782_15 Datasheet, PDF (10/28 Pages) Renesas Technology Corp – SOURCE DRIVER FOR 300/288-OUTPUT TFT-LCD (NAVIGATION, AUTOMOBILE LCD-TV)

µPD16782
4. PIN FUNCTIONS
Symbol
C1 to C3
S1 to S300
Pin Name
Video signal input
Video signal output
Pad No.
30 to 47
130 to 429
STHR,
STHL
Cascade I/O
81 to 86,
48 to 53
CLI1 to
CLI3
Shift clock input
69 to 77
INH
RESET
Inhibit input
Reset input
66 to 68
63 to 65
MP/TH
Multiplexer circuit
select input (1)
54 to 56
I/O
Input
Output
I/O
Input
Input
Input
Input
Description
Input R, G, and B video signals.
Video signal output pins. Output sampled and held video signals during
horizontal period.
Start pulse I/O pins of sample hold timing. STHR serves as an input pin
and STHL, as an output pin, in the case of right shift. In the case of left
shift, STHL serves as an input pin, and STHR, as an output pin.
A start pulse is read at the rising edge of CLI1. Sampling pulse SHPn is
generated at the rising edge of CLI1 through CLI3 during successive
sampling, and at the rising edge of CLI1 during simultaneous sampling
(for details, refer to the Timing charts in 5. FUNCTIONAL
DESCRIPTION).
Selects a multiplexer and one of the two sample and hold circuits at the
falling edge.
Resets the select counter of the multiplexer and the selector circuit of
the two sample and hold circuits when it goes high. After reset, the
multiplexer is turned OFF, so sure to input one pulse of the INH signal
before inputting the video signal. If the video signal is input without the
INH signal, sampling is not executed.
Four types of color filter arrays can be supported by combination of
MP/TH and MP/1.5.
MP/1.5
Multiplexer circuit
select input (2)
57 to 59
Input
Mode
Vertical stripe array
Single-side delta array
Mosaic array
Double-side delta array
MP/TH
L
L
H
H
MP/1.5
L
H
L
H
R,/L
Osel
Shift direction
select input
Selection of
Number of outputs
switching input
60 to 62
87 to 89
RMON1,
RMON2
Monitor
2, 3, 116,
117
Dummy1 to
Dummy4
VDD1
VDD2
VSS1
VSS2
TEST
Dummy
Logic power supply
Driver power
supply
Logic ground
Driver ground
Test
1, 118, 129,
430
23 to 29,
90 to 96
4 to 15,
104 to 115
16 to 22,
97 to 103
119 to 128,
431 to 440
78 to 80
Input
Input
R,/L = H: Right shift: STHR → S1 → S300 → STHL
R,/L = L: Left shift: STHL → S300 → S1 → STHR
Selects number of outputs.
Osel = L: 288 output mode
Osel = H: 300 output mode
Output pins S145 through S156 are invalid in 288 output mode.
The signal which is with S157 to S168 (R,/L = H) or S133 to S144 (R,/L = L)
is output identically.
This pin can measure the connection resistance at the time of COG
mounting. RMON1 and RMON2 are each short inside IC.
It does not connect with other pins inside IC.
No dummy pins are connected with other pins inside IC.
3.0 to 5.5 V
5.0 ± 0.5 V
Connect this pin to ground of system.
Connect this pin to ground of system.
Fix this pin to low level.
8
Data Sheet S15806EJ1V0DS