|
R5F52108ADFP Datasheet, PDF (1/92 Pages) Renesas Technology Corp – 50-MHz 32-bit RX MCUs, 78 DMIPS, up to 512-KB flash memory, 12-bit AD, 10-bit DA | |||
|
Preliminary Data Sheet
Specifications in this document are tentative and subject to change.
RX210 Group
Renesas MCUs
50-MHz 32-bit RX MCUs, 78 DMIPS, up to 512-KB flash memory,
12-bit AD, 10-bit DA, ELC, MPC, RTC, up to 9 comms interfaces;
incorporating functions for IEC60730 compliance
R01DS0041EJ0050
Rev.0.50
Apr 15, 2011
Features
â 32-bit RX CPU core
ï· Max. operating frequency: 50 MHz
Capable of 78 DMIPS in operation at 50 MHz
ï· Accumulator handles 64-bit results (for a single
instruction) from 32- Ã 32-bit operations
ï· Multiplication and division unit handles 32- Ã 32-bit
operations (multiplication instructions take one CPU
clock cycle)
ï· Fast interrupt
ï· CISC Harvard architecture with 5-stage pipeline
ï· Variable-length instructions, ultra-compact code
ï· On-chip debugging circuit
â Low-power design and architecture
ï· Operation from a single 1.62- to 5.5-V supply
ï· 1.62-V operation available (at up to 20 MHz)
ï· Deep software standby mode with RTC remaining usable
ï· Four low-power modes
â On-chip flash memory for code, no wait states
ï· 50-MHz operation, 20-ns read cycle
ï· No wait states for reading at full CPU speed
ï· 128- to 512-Kbyte capacities
ï· User code programmable via the SCI
ï· Programmable at 1.62 V
ï· For instructions and operands
â On-chip data flash memory
ï· Eight Kbytes, reprogrammable up to TBD times
ï· Erasing and programming impose no load on the CPU.
â On-chip SRAM, no wait states
ï· 20- to 64-Kbyte size capacities
â DMA
ï· DMACA: Incorporates four channels
ï· DTC: Four transfer modes
â ELC
ï· Module operation can be initiated by event signals
without going through interrupts.
ï· Modules can operate while the CPU is sleeping.
â Reset and supply management
ï· Nine types of reset, including the power-on reset (POR)
ï· Low voltage detection (LVD) with voltage settings
â Clock functions
ï· Frequency of external clock: Up to 20 MHz
ï· Frequency of the oscillator for sub-clock generation:
32.768 kHz
ï· PLL circuit input: 4 to 12.5 MHz
ï· On-chip low- and high-speed oscillators, dedicated on-
chip low-speed oscillator for the IWDT
ï· Generation of a dedicated 32.768-kHz clock for the RTC
ï· Clock frequency accuracy measurement circuit (CAC)
â Real-time clock
ï· Adjustment functions (30 seconds, leap year, and error)
ï· Time capture function
ï· Time capture on event-signal input through external pins
ï· RTC capable of initiating return from deep software
standby mode
PLQP0100KB-A 14 Ã 14 mm, 0.5-mm pitch
PLQP0080KB-A 12 Ã 12 mm, 0.5-mm pitch
PLQP0080JA-A 14 Ã 14 mm, 0.65-mm pitch
PLQP0064KB-A 10 Ã 10 mm, 0.5-mm pitch
PLQP0064GA-A 14 Ã 14 mm, 0.8-mm pitch
PTLG0100JA-A 7 Ã 7 mm, 0.65-mm pitch
â Independent watchdog timer
ï· 125-kHz on-chip low-speed oscillator produces a
dedicated clock signal to drive IWDT operation.
â Useful functions for IEC60730 compliance
ï· Self-diagnostic and disconnection-detection functions for
the AD converter, clock-frequency accuracy-
measurement circuit, independent watchdog timer,
functions to assist in RAM testing, etc.
â Up to nine communications interfaces
ï· SCI with many useful functions (up to seven interfaces)
ï· Asynchronous mode, clock synchronous mode, smart
card interface
ï· I2C bus interface: Transfer at up to 1 Mbps, capable of
SMBus operation (1 interface)
ï· RSPI (1)
â External address space
ï· Four CS areas (4 Ã 16 Mbytes)
ï· 8- or 16-bit bus space is selectable per area
â Up to 14 extended-function timers
ï· 16-bit MTU2: input capture, output capture,
complementary PWM output, phase counting mode (6
channels)
ï· 8-bit TMR (4 channels)
ï· 16-bit compare-match timers (4 channels)
â 12-bit A/D converter
ï· Capable of conversion within 1 μs
ï· Sample-and-hold circuits (for three channels)
ï· Three-channel synchronized sampling available
ï· Self-diagnostic function and analog input disconnection
detection assistance function
â 10-bit D/A converter
â Analog comparator
â Programmable I/O ports
ï· 5-V tolerant, open drain, input pull-up, switching of
driving ability
â MPC
ï· Multiple locations are selectable for I/O pins of
peripheral functions
â Temperature sensor
â Operating temp. range
ï· -40 ï°C to +85ï°C
R01DS0041EJ0050 Rev.0.50
Apr 15, 2011
Page 1 of 90
|
▷ |